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4/21/09 benefits improved gate, avalanche and dynamicdv/dt ruggedness fully characterized capacitance andavalanche soa enhanced body diode dv/dt and di/dtcapability www.irf.com 1 applications high efficiency synchronous rectification in smps uninterruptible power supply high speed power switching hard switched and high frequency circuits hexfet power mosfet
gds gate drain source irfr1018epbfIRFU1018Epbf notes through are on page 2 s d g d-pak irfr1018epbf i-pak IRFU1018Epbf v dss 60v r ds ( on ) typ. 7.1m max. 8.4m i d ( silicon limited ) 79a i d ( packa g e limited ) 56a absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) a i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery v/ns t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) avalanche characteristics e as (thermally limited) single pulse avalanche energy mj i ar avalanche current a e ar repetitive avalanche energy mj thermal resistance symbol parameter typ. max. units r jc junction-to-case CCC 1.32 r ja junction-to-ambient (pcb mount) CCC 50 r ja junction-to-ambient CCC 110 56 11 110 21 -55 to + 175 20 0.76 c/w 300 max. 79 56 315 8847 downloaded from: http:///

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calculated continuous current based on maximum allowable junction temperature. bond wire current limit is 56a. note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. repetitive rating; pulse width limited by max. junction temperature. limited by t jmax , starting t j = 25c, l = 0.08mh r g = 25 , i as = 47a, v gs =10v. part not recommended for use above this value. i sd 47a, di/dt 1668a/ s, v dd v (br)dss , t j 175c. s d g pulse width 400 s; duty cycle 2%. c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . when mounted on 1" square pcb (fr-4 or g-10 material). for recom mended footprint and soldering techniques refer to application note #an-994. r is measured at t j approximately 90c. static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 60 CCC CCC v v (br)dss / t j breakdown voltage temp. coefficient CCC 0.073 CCC v/c r ds(on) static drain-to-source on-resistance CCC 7.1 8.4 m v gs(th) gate threshold voltage 2.0 CCC 4.0 v i dss drain-to-source leakage current CCC CCC 20 a CCC CCC 250 i gss gate-to-source forward leakage CCC CCC 100 na gate-to-source reverse leakage CCC CCC -100 dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 110 CCC CCC s q g total gate charge CCC 46 69 nc q gs gate-to-source charge CCC 10 CCC q gd gate-to-drain ("miller") charge CCC 12 CCC q sync total gate charge sync. (q g - q gd ) CCC 34 CCC r g(int) internal gate resistance CCC 0.73 CCC t d(on) turn-on delay time CCC 13 CCC ns t r rise time CCC 35 CCC t d(off) turn-off delay time CCC 55 CCC t f fall time CCC 46 CCC c iss input capacitance CCC 2290 CCC c oss output capacitance CCC 270 CCC c rss reverse transfer capacitance CCC 130 CCC pf c oss eff. (er) effective output capacitance (energy related) CCC 390 CCC c oss eff. (tr) effective output capacitance (time related) CCC 630 CCC diode characteristics symbol parameter min. typ. max. units i s continuous source current CCC CCC 79 a (body diode) i sm pulsed source current CCC CCC 315 (body diode) v sd diode forward voltage CCC CCC 1.3 v t rr reverse recovery time CCC 26 39 ns t j = 25c v r = 51v, CCC 31 47 t j = 125c i f = 47a q rr reverse recovery charge CCC 24 36 nc t j = 25c di/dt = 100a/ s CCC 35 53 t j = 125c i rrm reverse recovery current CCC 1.8 CCC a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) i d = 47a r g = 10 v gs = 10v v dd = 39v i d = 47a, v ds =0v, v gs = 10v t j = 25c, i s = 47a, v gs = 0v integral reversep-n junction diode. conditions v gs = 0v, i d = 250 a reference to 25c, i d = 5ma v gs = 10v, i d = 47a v ds = v gs , i d = 100 a v ds = 60v, v gs = 0v v ds = 48v, v gs = 0v, t j = 125c mosfet symbol showing the v ds = 30v conditions v gs = 10v v gs = 0v v ds = 50v ? = 1.0mhz v gs = 0v, v ds = 0v to 60v v gs = 0v, v ds = 0v to 60v conditions v ds = 50v, i d = 47a i d = 47a v gs = 20v v gs = -20v downloaded from: http:///

www.irf.com 3 fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v 60 s pulse width tj = 25c 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v 60 s pulse width tj = 175c 4.5v 2 3 4 5 6 7 8 9 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 25v 60 s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 47a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 0 1000 2000 3000 4000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 1 02 03 04 05 06 0 q g total gate charge (nc) 0 4 8 12 16 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 48v v ds = 30v v ds = 12v i d = 47a downloaded from: http:///

4 www.irf.com fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 7. typical source-drain diode forward voltage fig 11. typical c oss stored energy fig 9. maximum drain current vs. case temperature fig 12. maximum avalanche energy vs. draincurrent 0.0 0.5 1.0 1.5 2.0 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 0 10 20 30 40 50 60 v ds, drain-to-source voltage (v) 0.0 0.2 0.4 0.6 0.8 e n e r g y ( j ) -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 60 65 70 75 80 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 5ma 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 350 400 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 5.3a 11a bottom 47a 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 i d , d r a i n c u r r e n t ( a ) limited by package 0.1 1 10 100 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 sec dc limited by package downloaded from: http:///

www.irf.com 5 fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far inexcess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b.4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15).t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) ? ( sec ) 0.026741 0.000007 0.28078 0.000091 0.606685 0.000843 0.406128 0.005884 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci i / ri ci= i / ri c 4 4 r 4 r 4 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 20 40 60 80 100 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 10% duty cycle i d = 47a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) downloaded from: http:///

6 www.irf.com fig 16. threshold voltage vs. temperature !
! -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 1.0a i d = 1.0ma i d = 250 a i d = 100 a 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 12 14 i r r ( a ) i f = 32a v r = 51v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 12 14 i r r ( a ) i f = 47a v r = 51v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 40 80 120 160 200 240 280 320 q r r ( a ) i f = 47a v r = 51v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 40 80 120 160 200 240 280 320 q r r ( a ) i f = 32a v r = 51v t j = 25c t j = 125c downloaded from: http:///

www.irf.com 7 fig 23a. switching time test circuit fig 23b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f fig 22b. unclamped inductive waveforms fig 22a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 24a. gate charge test circuit fig 24b. gate charge waveform
1 0.1 %
+ - vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 1k vcc dut 0 l s 20k ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period """ """ + - + + + - - - ? !" # $ ? ! % &'&& ? # (( ? &'&& ) ! '

"" " " ! "" !" fig 21. for hexfet power mosfets downloaded from: http:///

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int ernat ional as s e mb le d on ww 16, 2001 in the assembly line "a" or note: "p" in as s embly line pos ition example: lot code 1234 t his is an irfr120 with assembly i ndi cates "l ead- f r ee" product (optional) p = de s i gnat e s l e ad- f r e e a = assembly site code part number we e k 16 dat e code year 1 = 2001 rectifier int ernat ional logo lot code assembly 34 12 irfr120 116a line a 34 rectifier logo irfr120 12 as s e mb l y lot code year 1 = 2001 dat e code part number we e k 16 "p" in ass embly line position indicates "l ead- f r ee" qual i fi cati on to the cons umer - l evel p = de s i gnat e s l e ad- f r e e product qualified t o t he consumer level (optional) downloaded from: http:///

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78 line a logo international rectifier or product (optional) p = designates lead-free a = assembly site code irfu120 part number week 19 dat e code year 1 = 2001 rectifier international logo assembly lot code irfu120 56 dat e code part number lot code assembly 56 78 year 1 = 2001 week 19 119a indicates lead-free" as s embled on ww 19, 2001 in the assembly line "a" note: "p" in as s embly line pos ition example: with assembly this is an irfu120 lot code 5678 downloaded from: http:///

10 www.irf.com data and specifications subject to change without notice. this product has been designed for the industrial market. qualification standards can be found on irs web site.

tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 4/09 downloaded from: http:///

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